1. Field of the Invention
The present invention relates to an automatic gain control circuit, and more particularly, to an automatic gain control circuit controlling a gain of a receiver including two automatic gain control amplifiers.
2. Description of the Background Art
A receiver and the like performing digital modulation includes an automatic gain control amplifier (hereinafter referred to as an AGC amplifier) and an automatic gain control circuit (hereinafter referred to as an AGC circuit) controlling the gain of the AGC amplifier.
A receiver shown in FIG. 23 includes an antenna 123, a tuner 101, a bandpass filter 102, an AGC amplifier (A) 120, a frequency converter 103, an oscillator 104, an A/D converter 105, a demodulation circuit 514 and an error correction circuit 199.
Antenna 123 receives a radio frequency (RF) signal of a high frequency transmitted via a transmission path such as a ground wave, a satellite wave or a cable. Tuner 101 includes an AGC amplifier (B) 130, which amplifies the radio frequency (RF) signal output by antenna 123. Moreover, tuner 101 selects a signal of a desired channel from the amplified radio frequency (RF) signal and converts the signal into an intermediate frequency (IF) signal of 30 MHz–50 MHz.
Bandpass filter 102 only allows the component of the intermediate frequency (IF) to pass through. AGC amplifier (A) 120 amplifies the intermediate frequency (IF) signal. Oscillator 104 outputs a constant frequency signal. Frequency converter 103 mixes the constant frequency signal output by oscillator 104 and the intermediate frequency (IF) signal amplified at AGC amplifier (B) 130 to output a baseband signal.
A/D converter 105 converts the analog baseband signal into a digital baseband signal and sends the converted signal to demodulation circuit 514. A/D converter 105 is required to have a constant input amplitude in order to maintain constant conversion accuracy.
Error correction circuit 199 corrects an error in a bit string by a forward error correction method (hereinafter abbreviated as FEC). Error correction circuit 199 commences error correcting operation when A/D converter 105 obtains a constant input amplitude.
Demodulation circuit 514 includes a multiplier 115, a multiplier 116, an LPF (Low Pass Filter) 106, an LPF 107, a derotator 108, a decoder 109, an NCO (Numerical Control Oscillator) 111, a loop filter 112, a phase comparator 113, an AGC circuit 99 and a control circuit 98.
Multiplier 115 multiplies the baseband signal with a signal of a fixed frequency having a sine waveform output from a local oscillator to extract a symbol of an I-axis component of an input signal. Multiplier 116 multiplies the baseband signal with a signal of a fixed frequency having a cosine waveform output from the local oscillator to extract a symbol of a Q-axis component of an input signal.
LPF 106 and LPF 107 are low pass filters having the same frequency characteristic and performing spectrum shaping. Phase comparator 113 predicts an ideal symbol for the input symbol and detects a phase difference between these symbols.
Loop filter 112 performs smoothing of the detected phase difference and sends the result to NCO 111. NCO 111 is a numerical control oscillator, which sends sine and cosine wave signals each having a frequency proportional to the input smoothed phase difference to derotator 108. Derotator 108 is a complex multiplier, which receives the sine and cosine wave signals sent from NCO 111 and adjusts a phase shift and a frequency drift in the symbols. Decoder 109 converts symbol information into a bit string.
AGC circuit 99 sends a control signal AGCOUT controlling the gains of AGC amplifier (A) 120 and AGC amplifier (B) 130 such that A/D converter 105 has a constant input amplitude.
FIG. 24 shows the configuration of AGC circuit 99. Referring to FIG. 24, AGC circuit 99 includes a square-sum operation circuit 3, a square-root operation circuit 4, an adder 6, a multiplier 57, an adder 58, an AND circuit 59, a D-type flip-flop 60, a digital-analog converter (DAC) 61 and a control circuit 98.
Control circuit 98 sets values of AGCR and AGCG based on an entry for setting by the user. AGCR is an ideal power value of an input signal defined on a modulation method basis. AGCG is a value for adjusting an absolute value having the magnitude of control signal AGCOUT sent to AGC amplifier (A) 120 and AGC amplifier (B) 130. After power input, control circuit 98 sets a reset signal RST=“0” for reset execution, and thereafter sets reset signal RST=“1” for reset release.
Square-sum operation circuit 3 calculates a square sum of AGCIN (symbol information for the I-axis and Q-axis) output from LPF 106 and LPF 107. Square-root operation circuit 4 calculates a square root of a square sum of AGCIN, i.e. a power P of an input signal. Adder 6 performs subtraction on power P of the input signal and (AGCR), to output (P−AGCR). Multiplier 57 multiplies (P−AGCR) with AGCG to output {(P−AGCR)×AGCG}.
Adder 58, AND circuit 59 and D-type flip-flop 60 form a loop filter. The loop filter outputs “0” if RST=“0,” and averages outputs of multiplier 57, i.e. the values of {(P−AGCR)×AGCG}, for output if RST=“1.”
Digital-analog converter (DAC) 61 outputs control signal AGCOUT obtained by converting the output signal of the loop filter into an analog value to AGC amplifier (A) 120 and AGC amplifier (B) 130.
If the output signal of the loop filter is a minimum value of “0,” the gain of AGC amplifier (A) 120 is a maximum value of “MAXGAINA” whereas the gain of AGC amplifier (B) 130 is a maximum value of “MAXGAINB.” If the output signal of the loop filter is a maximum value of “1,” the gain of AGC amplifier (A) 120 is a minimum value of “MINGAINA” whereas the gain of AGC amplifier (B) 130 is a minimum value of “MINGAINB.”
Accordingly, the AGC circuit controls the gains of AGC amplifier (A) 120 and AGC amplifier (B) 130 such that power P of an input signal and an ideal power value AGCR of an input signal defined on a modulation method basis have a small difference (P−AGCR). Thus, AID converter 105 may have a constant input amplitude.
The input signal, however, includes a large amount of noise due to superimposition of a reflected signal of the input signal within the transmission path or undesirable radiation such as spurious. Thus, the calculated power value of the input signal in the AGC circuit described above is not very reliable. Control of the gain of an AGC amplifier based on such a power value would result in an extremely low bit error rate of the bit string output from the demodulation circuit.
In addition, the two AGC amplifiers each has a unique characteristic. For instance, AGC amplifier (B) 130 amplifying a RF signal has a characteristic such that it is preferably used having a gain as close to the maximum gain as possible in order to amplify a received input signal to the size that can be processed in a subsequent stage even if the input signal has a low level.
In the AGC circuit described above, however, the gains of the two AGC amplifiers are controlled such that each of them has a maximum value if the output signal of the loop filter is a minimum value, while the gains of the two AGC amplifiers are controlled such that each gain has a minimum value if the output signal of the loop filter is a maximum value. The two AGC amplifiers cannot be controlled separately.